The present invention relates to an integrated circuit device and a method of producing an integrated circuit device. More particularly, the present invention relates to an integrated circuit device having a cyanate ester buffer coat and a method of producing the integrated circuit device.
Both high density and lower density integrated circuits are fabricated on wafers utilizing numerous fabrication techniques, including, but not limited to photolithography, masking, diffusion, ion implantation, etc. After the wafers are fabricated, with the wafer including a plurality of integrated circuit dies, a die coat is commonly used to protect the plurality of integrated circuit dies from damage during the remainder of the manufacturing process. It is commonly known to use polyimides as the buffer or die coat when fabricating such devices or wafers.
Thermosetting resins, such as cyanate esters, have been used in various applications that span electronic, structural aerospace, and microwave transparent composites as well as encapsualants and adhesives. Cyanate esters are described in the paper Arocy(copyright) Cyanate Ester Resins Chemistry, Properties and Applications, by D. A. Shimp, J. R. Christerson, and S. J. Ising (Second Editionxe2x80x94January 1990). Some examples of uses of cyanate esters include spinning cyanate ester onto a wafer for the purpose of making a durable base for building electric conductive metal features and also circuit board configurations.
Polyimides utilized as a spin-on die coat are somewhat expensive. Many polyimides have a high dielectric constant and to not cure very quickly. Cyanate esters on the other hand have a lower dielectric constant than most polyimides and further cure more quickly than polyimides. In addition, polyimide buffer coats do not have extremely consistent photo-imageable characteristics. For example, when using photo-masking or photolithography techniques with polyimides, such techniques are not always highly successful or reliable. Therefore, in view of the above, there is a need for improved buffer coats for the fabrication process and improved integrated circuit devices resulting therefrom.
In accordance with the present invention, an integrated circuit includes a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material has one or more openings for access to the die. In another embodiment of the integrated circuit, die bond pads are connected to a die package device through such openings.
In accordance with another embodiment of the invention, the integrated circuit device includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer includes an upper surface having a cyanate ester buffer coating material cured thereon.
In a further embodiment, the cyanate ester coating material may be cured on a substantially planar or nonplanar surface of the fabricated die. Further, the upper surface of the fabricated wafer may be a substantially planar or nonplanar surface.
In the method of the present invention, integrated circuit devices are produced by providing a fabricated wafer including a plurality of integrated circuits. The cyanate ester coating material is applied and cured on a surface of the fabricated wafer.
In further embodiments of the method, the cyanate ester coating material may be spun on the surface of the fabricated wafer to form a buffer coat, the surface of the fabricated wafer may be a substantially planar or nonplanar surface, and/or the buffer coat may be a photosensitive buffer coat.